METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a Continuation of International Patent Application No. PCT/JP2024/014280, filed Apr. 8, 2024, which claims the benefit of Japanese Patent Application No. 2023-115732, filed Jul. 14, 2023, both of which are hereby incorporated by reference herein in their entirety.

BACKGROUND OF THE INVENTION Field of the Invention

The present invention relates to a method of manufacturing a semiconductor device, and a semiconductor device.

Background Art

As one of methods of solving performance degradation caused by an increase in channel resistance or the like with respect to a semiconductor device (for example, a thin-film transistor or a semiconductor storage device), there is provided a method of single-crystallizing amorphous silicon or polysilicon in a channel. As a single crystallization method, there is a MILC (Metal Induced Lateral Crystallization) process in which Ni silicide is used for the growth end of crystallization. As an example of the MILC process, “Thin-Film Transistor Using Metal Induced Lateral Crystallization Method and Method of Manufacturing the Same” described in PTL 1 will be explained with reference to FIGS. 1 to 3. Referring to FIGS. 1 to 3, reference numeral 200 denotes an insulating substrate; 210, a buffer layer; 220, an active layer; 221 and 225, source/drain regions; 223, a channel region; 230, a gate insulating film; 240, a gate electrode; 250, an interlayer insulating film, 251 and 255, contact holes; and 260, a crystallization induced metal film.

As shown in FIG. 1, the interlayer insulating film 250 is deposited on the insulating substrate 200 including the gate electrode 240 to form the contact holes 251 and 255 that expose parts of the source/drain regions 221 and 225. Next, the crystallization induced metal film 260 made of Ni or the like is deposited on the insulating substrate 200 by a method such as sputtering.

Next, as shown in FIG. 2, an amorphous silicon film of the active layer 220 is crystallized by performing annealing in a furnace, and is changed to a polysilicon film (crystallized at 550° C. at a speed of 3 μm/hr). At this time, amorphous silicon in lower regions 221a and 225a below the crystallization induced metal film 260 in the contact holes 251 and 255 is crystallized by a Metal Induced Crystallization (MIC) method, and amorphous silicon in remaining regions 221b and 225b is crystallized by the MILC method.

Next, as shown in FIG. 3, the crystallization induced metal film 260 is removed and source/drain electrodes 271 and 275 are formed, thereby obtaining a thin-film transistor.

PTL 2 discloses a nonvolatile semiconductor storage device that includes a semiconductor substrate, a first layer, a second conductive layer, a memory film, and a semiconductor layer, and includes a metal layer contacting the semiconductor layer and containing Ni, Co, Al, or Pd, in order to make an attempt to relax operation control and circuit layout design while improving an operation speed such as a read speed, a write speed, and a removal speed. In addition, PTL 2 discloses as follows. “In a case where the a metal layer 70 is made of a material not forming a silicide, such as Al, after annealing, a portion near a lower end portion of a semiconductor pillar SP may contain an Al alloy and a portion near an upper end portion of the semiconductor pillar SP may contain an Al alloy. Without limitation to the portions near the upper end portion and the lower end portion of the semiconductor pillar SP, the semiconductor pillar SP may contain an Al alloy.”

PTL 3 discloses a semiconductor storage device including a first wiring layer, a second wiring layer, and a memory pillar in order to improve processing capability. Furthermore, according to PTL 3, since the lattice parameter of NiSi₂ has a mismatch of only about 0.3% with respect to the lattice parameter of Si, NiSi₂ is suitable for forming single-crystal silicon by the MILC method. It is disclosed that examples of a metal material for crystallizing a semiconductor pillar (for example, silicon, silicon germanium, or germanium) by the MILC method are Ni, Co, Al and Pd.

NPL 1 relates to the lattice parameter of Si, that of NiSi₂, and that of NiSi_2-XAl_X. The abscissa of FIG. 4 represents a ratio X of Al to NiSi_2-XAl_X, a represents the lattice parameter of Si, and the ordinate of FIG. 4 represents the lattice parameter. It is apparent from FIG. 4 that when the lattice parameter of NiSi₂ is 5.406, the lattice parameter of Si is 5.431, and when the ratio X of Al is 0.24, NiSi_2-XAl_X=5.431 which matches the lattice parameter of Si. Note that the unit of the lattice parameter in NPL 1 is angstrom, and this specification also assumes that the unit of the lattice parameter is angstrom.

CITATION LIST Patent Literature

• PTL 1: Japanese Patent Laid-Open No. 2005-159307
• PTL 2: Japanese Patent Laid-Open No. 2014-175348
• PTL 3: Japanese Patent Laid-Open No. 2019-165178

Non Patent Literature

• NPL 1: Klaus et al. “Appl. Phys. Lett. 83, 497(2003)” pp. 497-499

SUMMARY OF THE INVENTION

The present invention provides a technique of converting amorphous silicon into single-crystal silicon by a silicide having a lattice parameter closer to the lattice parameter of the single-crystal silicon.

A first aspect of the present invention is related to a method of manufacturing a semiconductor device, including a conversion step of converting amorphous silicon into single-crystal silicon, and in the method of manufacturing, the conversion step includes: a first step of forming a silicide to contact the amorphous silicon by forming, by treatment with heating, a first film containing a first material to cover the amorphous silicon, a second step of forming a compound formed by Si, the first material, and a second material to contact the silicide by forming, by treatment with heating, a second film containing the second material to cover the silicide after the first step, and a third step of changing the silicide remaining after the second step to the compound by annealing, the first material is one material selected from a group consisting of Ni, Pd, Ti, Cu, Pt, Co, Mo, Mg, W, Cr, and Mn, and the second material is one material selected from a group consisting of Al, Au, Sb, In, Ag, and Ga.

A second aspect of the present invention is related to a method of manufacturing a semiconductor device, including a conversion step of converting amorphous silicon into single-crystal silicon, and in the method of manufacturing, the conversion step includes: a first step of forming a first film containing a first material to cover the amorphous silicon, a second step of forming a second film containing a second material to cover the first film after the first step, and a third step of forming a compound containing Si, the first material, and the second material by annealing after the second step, the first material is one material selected from a group consisting of Ni, Pd, Ti, Cu, Pt, Co, Mo, Mg, W, Cr, and Mn, and the second material is one material selected from a group consisting of Al, Au, Sb, In, Ag, and Ga.

A third aspect of the present invention is related to a semiconductor device including a stacked structure of amorphous silicon, a compound, and single-crystal silicon, and in the semiconductor device, the compound is a compound of Si, a first material, and a second material, the first material is one material selected from a group consisting of Ni, Pd, Ti, Cu, Pt, Co, Mo, Mg, W, Cr, and Mn, and the second material is one material selected from a group consisting of Al, Au, Sb, In, Ag, and Ga.

Further features of the present invention will become apparent from the following description of exemplary embodiments with reference to the attached drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a process cross-sectional view for explaining a method of manufacturing a thin-film transistor described in PTL 1;

FIG. 2 is a process cross-sectional view for explaining the method of manufacturing the thin-film transistor described in PTL 1;

FIG. 3 is a process cross-sectional view for explaining the method of manufacturing the thin-film transistor described in PTL 1;

FIG. 4 is a graph showing the relationship among the lattice parameter of Si, that of NiSi₂, and that of NiSi_2-XAl_X described in NPL 1;

FIG. 5A is a process diagram showing a method of manufacturing a semiconductor device according to the first embodiment;

FIG. 5B is a process diagram showing the method of manufacturing the semiconductor device according to the first embodiment;

FIG. 5C is a process diagram showing the method of manufacturing the semiconductor device according to the first embodiment;

FIG. 6A is a process diagram showing a method of manufacturing a semiconductor device according to the second embodiment;

FIG. 6B is a process diagram showing the method of manufacturing the semiconductor device according to the second embodiment;

FIG. 6C is a process diagram showing the method of manufacturing the semiconductor device according to the second embodiment;

FIG. 7A is a process diagram showing a method of manufacturing a semiconductor device according to the third embodiment;

FIG. 7B is a process diagram showing the method of manufacturing the semiconductor device according to the third embodiment;

FIG. 7C is a process diagram showing the method of manufacturing the semiconductor device according to the third embodiment;

FIG. 8A is a process diagram showing the method of manufacturing the semiconductor device according to the first embodiment;

FIG. 8B is a process diagram showing the method of manufacturing the semiconductor device according to the first embodiment;

FIG. 8C is a process diagram showing the method of manufacturing the semiconductor device according to the first embodiment;

FIG. 9 is a process diagram showing a method of manufacturing a semiconductor device according to the fourth embodiment;

FIG. 10 is a process diagram showing the method of manufacturing the semiconductor device according to the fourth embodiment;

FIG. 11 is a process diagram showing the method of manufacturing the semiconductor device according to the fourth embodiment;

FIG. 12 is a process diagram showing the method of manufacturing the semiconductor device according to the fourth embodiment;

FIG. 13 is a process diagram showing the method of manufacturing the semiconductor device according to the fourth embodiment;

FIG. 14 is a process diagram showing the method of manufacturing the semiconductor device according to the fourth embodiment;

FIG. 15 is a process diagram showing the method of manufacturing the semiconductor device according to the fourth embodiment;

FIG. 16 is a process diagram showing the method of manufacturing the semiconductor device according to the fourth embodiment;

FIG. 17 is a process diagram showing the method of manufacturing the semiconductor device according to the fourth embodiment;

FIG. 18A is a process diagram showing a method of manufacturing a semiconductor device according to the fifth embodiment; and

FIG. 18B is a process diagram showing the method of manufacturing the semiconductor device according to the fifth embodiment.

DESCRIPTION OF THE EMBODIMENTS

Hereinafter, embodiments will be described in detail with reference to the attached drawings. Note, the following embodiments are not intended to limit the scope of the claimed invention. Multiple features are described in the embodiments, but limitation is not made to an invention that requires all such features, and multiple such features may be combined as appropriate. Furthermore, in the attached drawings, the same reference numerals are given to the same or similar configurations, and redundant description thereof is omitted.

FIGS. 5A to 5C are views schematically showing the first embodiment of a method of manufacturing a semiconductor device, which includes a conversion step of converting amorphous silicon 1 into single-crystal silicon 10. From the result of an experiment of heating a structure obtained by sequentially depositing an Al film and Ni film on amorphous silicon, the present inventor has found that the Al film inhibits silicidation of the Ni film. Furthermore, from the result of an experiment of heating a structure obtained by depositing an NiAl film on amorphous silicon, the present inventor has found that Al is pushed out to the surface side of the NiAl film without being contained in Ni silicide. The present inventor has found a phenomenon that when an Ni silicide film contacting amorphous silicon is formed by forming an Ni film on the amorphous silicon by treatment with heating and then an Al film is formed on the Ni silicide film by treatment with heating, Al diffuses in the Ni silicide film to form NiAlSi. Since NiAlSi has a lattice parameter close to that of single-crystal silicon, it is possible to readily obtain single-crystal silicon by performing annealing while NiAlSi is in contact with amorphous silicon. The following embodiments are based on the above knowledge.

The method of manufacturing the semiconductor device according to the first embodiment can include the conversion step of converting the amorphous silicon 1 into the single-crystal silicon 10. The amorphous silicon 1 can form part of a substrate. The conversion step can include

• • a first step S1 of forming Ni silicide as a silicide 4 contacting the amorphous silicon 1 by forming, by annealing with heating, a first film 3 containing Ni (nickel) as a first material to cover the amorphous silicon 1,
  • a second step S2 of forming NiAlSi as a compound 7 containing Si (silicon), Ni (first material), and Al (second material) to contact the silicide 4 by forming, by treatment with heating, a second film 6 containing Al (aluminum) as the second material to cover the silicide 4 after the first step S1, and
  • a third step S3 of changing the silicide 4 remaining after the second step S2 to an NiAlSi film as a compound 9 containing Si, Ni (first material), and Al (second material) by annealing.

This can create a structure in which NiAlSi as the compound 9 is arranged to contact the amorphous silicon 1.

FIG. 5A shows a structure 101 in a state in which the first film 3 containing Ni as the first material is formed by annealing with heating to cover the amorphous silicon 1 in the first step S1, and a structure 102 in which Ni silicide as the silicide 4 is formed. FIG. 5B shows a structure 104 in a state in which the second film 6 containing Al as the second material is formed by treatment with heating to cover the silicide 4, and a structure 105 in a state in which NiAlSi as the compound 7 containing Si, Ni (first material), and Al (second material) is formed to contact the silicide 4. FIG. 5C shows a structure 106 containing the silicide 4 remaining after the second step S2, and a structure 107 after the silicide 4 changes to the compound 9 by annealing.

As the first material, instead of Ni, Pd (palladium), Ti (titanium), Cu (copper), Pt (platinum), Co (cobalt), Mo (molybdenum), Mg (magnesium), W (tungsten), Cr (chromium), or Mn (manganese) may be used. That is, the first material can be one material selected from a group consisting of Ni, Pd, Ti, Cu, Pt, Co, Mo, Mg, W, Cr, and Mn.

As the second material, instead of Al, Au (gold), Sb (antimony), In (indium), Ag (silver), or Ga (gallium) may be used. That is, the second material can be one material selected from a group consisting of Al, Au, Sb, In, Ag, and Ga.

A compound containing Si, the first material, and the second material is preferably, for example, NiAuSi, NiSbSi, NiInSi, NiAgSi, or NiGaSi, instead of NiAlSi.

The conversion step of converting the amorphous silicon 1 into the single-crystal silicon 10 can further include a fourth step S4 of changing at least part of the amorphous silicon 1 remaining after the third step S3 to the single-crystal silicon 10 by annealing. FIG. 5C shows a structure 108 after at least part of the amorphous silicon 1 remaining after the third step S3 changes to the single-crystal silicon 10 by annealing. The fourth step can include a MILC (Metal Induced Lateral Crystallization) process.

The substrate subject to the first step can include an insulating film 2 (for example, SiO₂: silicon dioxide) in addition to the amorphous silicon 1. The amorphous silicon 1 and the insulating film 2 can be arranged to contact each other or close to each other. In the first step S1, in addition to the silicide 4 contacting the amorphous silicon 1, a first material film 3′ may be formed to contact the insulating film 2 by forming, by treatment with heating, the first film 3 containing the first material (for example, Ni) to cover the insulating film 2 in addition to the amorphous silicon 1. FIG. 5A shows the structure 102 including the first material film 3′.

In this case, the conversion step can further include, between the first step S1 and the second step S2, a step of removing the first material film 3′ contacting the insulating film 2 by chemical etching or the like. FIG. 5A shows the structure 103 in which the first material film 3′ is removed. By removing the first material film 3′, it is possible to prevent a situation in which the silicide 4 laterally grows to be associated with another silicide 4 and thus electrical short-circuit occurs. In a case where the first material film 3′ contacting the insulating film 2 is removed, in the second step S2, a second material film 8 as part of the second film 6 remains in a portion covering the insulating film 2 when forming NiAlSi as the compound 7 containing Si, Ni (first material), and Al (second material) to contact the silicide 4. The second material film 8 can be removed after the second step S2 (for example, between the second step S2 and the third step S3).

A thickness T₂ of the second film 6 formed in the second step S2 (a thickness of the second film 6 in a portion covering the Ni silicide 4) is preferably larger than a thickness T₁ of the first film 3 formed in the first step S1, and smaller than four times the thickness T₁ of the first film 3 formed in the first step S1. That is, 0<T₂<4T₁ is preferably satisfied.

T₂=0 indicates that the value of X on the abscissa of FIG. 4 is 0. In this case, the lattice parameter of NiSi_2-0Al₀ (that is, NiSi₂) is 5.406. T₂=4T₁ indicates that the value of X on the abscissa of FIG. 4 is 0.54. When the value of X is 0.54, the lattice parameter of NiSi_1.46Al_0.4 is 5.454.

If 0<T₂<4T₁ is satisfied, the lattice parameter of NiSi_2-XAl_X is given by the following expression.

$5.406<\mathrm{lattice}\mathrm{parameter}\mathrm{of}{\mathrm{NiSi}}_{2-X}{\mathrm{Al}}_X<5.454$

Therefore, since the lattice parameter of NiSi_2-XAl_X is close to the lattice parameter of Si=5.430, as compared with the lattice parameter (5.406) of NiSi₂, it is known that this is suitable for forming single-crystal silicon by the MILC process.

This can reduce channel resistance that is a problem for a semiconductor device such as a thin-film transistor or a semiconductor storage device (for example, a 3D NAND memory).

FIGS. 6A to 6C are views schematically showing the second embodiment of a method of manufacturing a semiconductor device, which includes a conversion step of converting amorphous silicon 1 into single-crystal silicon 10.

Matters not mentioned as the second embodiment can comply with the first embodiment. FIG. 6A schematically shows a first step S1, FIG. 6B schematically shows a second step S2, and FIG. 6C schematically shows a third step S3 and a fourth step S4.

In the second embodiment, a first material film 3′ contacting an insulating film 2 is not removed between the first step S1 and the second step S2. Therefore, in the second step S2, by forming, by treatment with heating, a second film 6 containing Al as a second material to cover a silicide 4 and the first material film 3′, a second compound 11 of a first material and the second material is obtained to contact the insulating film 2 in addition to a compound 7 contacting the silicide 4.

In the second embodiment, the conversion step can include, between the second step S2 and the third step S3, a step of removing the second compound 11 contacting the insulating film 2. By removing the second compound 11, it is possible to prevent a situation in which the silicide 4 laterally grows to be associated with another silicide 4 and thus electrical short-circuit occurs. FIG. 6B shows a structure 106 in which the second compound 11 is removed.

FIGS. 7A to 7C are views schematically showing the third embodiment of a method of manufacturing a semiconductor device, which includes a conversion step of converting amorphous silicon into single-crystal silicon. Matters not mentioned as the third embodiment can comply with the first embodiment. FIG. 7A schematically shows a first step S1, FIG. 7B schematically shows a second step S2, and FIG. 7C schematically shows a third step S3 and a fourth step S4.

In the third embodiment, a first material film 3′ contacting an insulating film 2 is not removed between the first step S1 and the second step S2. Therefore, in the second step S2, by forming, by treatment with heating, a second film 6 containing Al as a second material to cover a silicide 4 and the first material film 3′, a second compound 11 of a first material and the second material is obtained to contact the insulating film 2 in addition to a compound 7 contacting the silicide 4. In the second embodiment, the second compound 11 contacting the insulating film 2 is not removed between the second step S2 and the third step S3.

In the third embodiment, the conversion step can include, after the third step S3 and more specifically between the third step S3 and the fourth step S4, a step of removing the second compound 11 contacting the insulating film 2. By removing the second compound 11, it is possible to prevent a situation in which the silicide 4 laterally grows to be associated with another silicide 4 and thus electrical short-circuit occurs. FIG. 7C shows a structure 107 in which the second compound 11 is removed.

In each of the first to third embodiments, the referred drawings show that the first film and the second film are formed on the amorphous silicon 1. These drawings merely show that the first film and the second film are formed on the amorphous silicon 1 in the posture shown in the drawings. The formation of the first film and the second film on the amorphous silicon 1 does not limit the present invention to formation of the first film and the second film above the amorphous silicon 1 in a film forming apparatus. The formation of the first film and the second film on the amorphous silicon 1 includes formation of the first film and the second film below the amorphous silicon 1 in a film forming apparatus, as exemplified in FIGS. 8A to 8C.

The fourth embodiment of a method of manufacturing a semiconductor device will be described next with reference to FIGS. 9 to 17. The fourth embodiment provides a method of manufacturing a semiconductor storage device as an example of the semiconductor device. An example of manufacturing a semiconductor storage device including a NAND string will now be described. The NAND string includes a plurality of thin-film transistors connected in series.

Referring to FIGS. 9 to 17, reference numeral 100 denotes a semiconductor substrate; 111, 114, 116, and 136, insulating films; 112 and 113, wiring layers; 115, a gate electrode layer; 119, a tunnel insulating film; 120, a charge accumulation layer; 121, a block insulating film; 135, amorphous silicon; 123, a core layer; 124A, 124B, and 141, silicide layers; 125, a cap layer; and 136, a conductive layer. Reference symbol GP denotes a gap; MP, a memory pillar; and SLT, a slit.

In a state shown in FIG. 9, the gap GP communicates with an external space via the slit SLT. The amorphous silicon 135 corresponds to the above-described amorphous silicon 1, and is to be single-crystallized. The amorphous silicon 135 is exposed to the gap GP. In this state, in a first step shown in FIGS. 10 and 11, Ni silicide as a silicide 4 is formed to contact the amorphous silicon 135 by forming, by annealing treatment with heating, a first film 3 containing Ni as a first material to cover the amorphous silicon 135. At this time, in addition to the silicide 4 contacting the amorphous silicon 135, a first material film 3′ can be formed to contact the insulating film. The first material film 3′ can be removed thereafter.

Next, in a second step shown in FIGS. 12 and 13, NiAlSi as a compound 7 containing Si, Ni (first material), and Al (second material) is formed to contact the silicide 4 by forming, by treatment with heating, a second film 6 containing Al as the second material to cover the silicide 4. At this time, a second material film 8 as part of the second film 6 remains in a portion covering the insulating film 136 and the like.

Next, in an arbitrary step shown in FIG. 14, the second material film 8 on the insulating film is removed. Next, in a third step shown in FIG. 15, the silicide 4 remaining after the second step is changed to an NiAlSi film as a compound 9 containing Si, Ni (first material), and Al (second material) by annealing.

Next, in a fourth step shown in FIGS. 16 and 17, at least part of the amorphous silicon 135 remaining after the third step is changed to single-crystal silicon 10 by annealing. The fourth embodiment is advantageous in reducing channel resistance that is a problem for a semiconductor storage device (for example, a 3D NAND memory).

FIGS. 18A and 18B are views schematically showing the fifth embodiment of a method of manufacturing a semiconductor device, which includes a conversion step of converting amorphous silicon into single-crystal silicon. Matters not mentioned as the fifth embodiment can comply with the first to third embodiments. The fifth embodiment is applicable to the fourth embodiment.

The fifth embodiment of the method of manufacturing the semiconductor device can include a conversion step of converting amorphous silicon 1 into single-crystal silicon 10. The amorphous silicon 1 can form part of a substrate. The conversion step can include a first step S1′ of forming a first film 3 containing Ni as a first material to cover the amorphous silicon 1, a second step S2′ of forming a second film 6 containing Al as a second material to cover the first film 3 after the first step S1′, and a third step S3′ of changing the first and second film into an NiAlSi film as a compound 9 containing Si, Ni (first material), and Al (second material) by annealing after the second step S2′.

This can create a structure in which NiAlSi as the compound 9 is arranged to contact the amorphous silicon 1.

As the first material, instead of Ni, Pd (palladium), Ti (titanium), Cu (copper), Pt (platinum), Co (cobalt), Mo (molybdenum), Mg (magnesium), W (tungsten), Cr (chromium), or Mn (manganese) may be used. That is, the first material can be one material selected from a group consisting of Ni, Pd, Ti, Cu, Pt, Co, Mo, Mg, W, Cr, and Mn.

As the second material, instead of Al, Au (gold), Sb (antimony), In (indium), Ag (silver), or Ga (gallium) may be used. That is, the second material can be one material selected from a group consisting of Al, Au, Sb, In, Ag, and Ga.

A compound containing Si (silicon), Ni (first material), and Al (second material) is preferably, for example, NiAuSi, NiSbSi, NiInSi, NiAgSi, or NiGaSi, instead of NiAlSi.

The conversion step of converting the amorphous silicon 1 into the single-crystal silicon 10 can further include a fourth step S4′ of changing at least part of the amorphous silicon 1 remaining after the third step S3′ to the single-crystal silicon 10 by annealing. The conversion step may include, between the third step S3′ and the fourth step S4′, a step of removing a second compound 11 contacting an insulating film 2.

A stacked structure of the amorphous silicon 1, the compound 9, and the single-crystal silicon 10 is formed via the fourth step S4′. The fourth step S4′ can include a MILC (Metal Induced Lateral Crystallization) process. The thickness of the second film 6 formed in the second step S2′ is preferably larger than the thickness of the first film 3 formed in the first step S1′, and smaller than four times the thickness of the first film 3 formed in the first step S1′.

The present invention is not limited to the above embodiments and various changes and modifications can be made within the spirit and scope of the present invention. Therefore, to apprise the public of the scope of the present invention, the following claims are made.

REFERENCE SIGNS LIST

1: amorphous silicon, 2: insulating film, 3: first film (for example, Ni film), 3′; first material film (for example, Ni film), 4: silicide (for example, Ni silicide), 6: second film (for example, Al film), 7: compound (for example, NiAlSi), 8: second material film (for example, Al film), 9: compound (for example, NiAlSi), 10: single-crystal silicon, 11: second compound (for example, NiAl)

Publication number: 20250081500
Type: Application
Filed: Nov 11, 2024
Publication Date: Mar 6, 2025
Applicant: CANON ANELVA CORPORATION (Kawasaki-shi)
Inventors: Naoko MATSUI (Tokyo), Yuto YOSHIDA (Tokyo), Toshikazu IRISAWA (Kanagawa)
Application Number: 18/943,526

International Classification: H01L 29/66 (20060101); H01L 21/02 (20060101); H01L 29/786 (20060101); H10B 43/27 (20060101); H10B 43/35 (20060101);